DocumentCode :
754160
Title :
Investigation of inductively coupled plasma gate oxide on low temperature polycrystalline-silicon TFTs
Author :
Chang-Ho Tseng ; Ting-Kuo Chang ; Fang-Tsun Chu ; Jia-Min Shieh ; Bau-Tong Dai ; Huang-Chung Cheng ; Chin, A.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Thug Univ., Hsinchu, Taiwan
Volume :
23
Issue :
6
fYear :
2002
fDate :
6/1/2002 12:00:00 AM
Firstpage :
333
Lastpage :
335
Abstract :
By optimizing the inductively coupled plasma (ICP) oxidation condition, a thin oxide of 10 nm has been grown at 350/spl deg/C to achieve excellent gate oxide integrity of low leakage current<5×10/sup -8/ A/cm2 (at 8 MV/cm), high breakdown field of 9.3 MV/cm and low interface trap density of 1.5×10/sup 11/ /eV cm2. The superior performance poly-Si TFTs using such a thin ICP oxide were attained to achieve a high ON current of 110 μA/μm at V/sub D/=1 V and V/sub G/=5 V and the high electron field effect mobility of 231 cm2/V/spl middot/S.
Keywords :
MOSFET; dielectric thin films; elemental semiconductors; interface states; leakage currents; oxidation; semiconductor device breakdown; semiconductor-insulator boundaries; silicon; thin film transistors; 10 nm; ICP oxidation condition optimisation; Si thin-film transistor; SiO/sub 2/-Si; gate oxide integrity; high breakdown field; high electron field effect mobility; inductively coupled plasma gate oxide; low interface trap density; low leakage current; poly-Si TFTs; polysilicon TFT; Argon; Electric breakdown; Leakage current; Oxidation; Plasma materials processing; Plasma sheaths; Plasma sources; Plasma temperature; Substrates; Thin film transistors;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2002.1004226
Filename :
1004226
Link To Document :
بازگشت