Title :
Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface
Author :
Ming-Dou Ker ; Chien-Hui Chang
Author_Institution :
Nanoelectronics & Gigascale Syst. Lab., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
6/1/2002 12:00:00 AM
Abstract :
A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using a thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35 μm CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 μm can be obviously improved from the original /spl sim/2 kV to be greater than 8 kV by this SNTSCR device with device dimensions of only 60 μm/0.35 μm.
Keywords :
CMOS integrated circuits; dielectric thin films; electrostatic discharge; integrated circuit layout; integrated circuit reliability; protection; thyristors; 0.35 micron; 120 micron; 2 kV; 60 micron; 8 kV; CMOS ICs; CMOS process compatibility; ESD clamp; ESD protection; ESD robustness; HBM ESD level; SNTSCR; SNTSCR device dimensions; Si; SiO/sub 2/-Si; electrostatic discharge clamp device; gate oxide reliability; high/low-voltage-tolerant I/O interface; layout parameters; mixed-voltage I/O buffers; stacked-NMOS channel width; stacked-NMOS triggered silicon-controlled rectifier; CMOS process; Circuits; Clamps; Electrostatic discharge; MOS devices; Protection; Rectifiers; Robustness; Thyristors; Voltage;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2002.1004236
