• DocumentCode
    754804
  • Title

    Efficient Decoupling Capacitance Budgeting Considering Operation and Process Variations

  • Author

    Shi, Yiyu ; Xiong, Jinjun ; Liu, Chunchen ; He, Lei

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, Los Angeles, CA
  • Volume
    27
  • Issue
    7
  • fYear
    2008
  • fDate
    7/1/2008 12:00:00 AM
  • Firstpage
    1253
  • Lastpage
    1263
  • Abstract
    This paper solves the variation-aware decoupling capacitance (decap) budgeting problem. Unlike previous works which only consider worst case design, for the first time, we consider the input of both process variation and operation variation for decap budgeting. A novel stochastic current model is proposed that efficiently and accurately captures temporal correlation between clock cycles, logic-induced correlation between ports, and current variation due to process variation with spatial correlation. An iterative alternative programming algorithm that is applicable to a variety of current models is then developed. Compared with the baseline model which assumes maximum current peaks at all ports, the model considering temporal correlation reduces noise by up to 5times, and the model considering both temporal and logic-induced correlations reduces noise by up to 17times. Compared with using deterministic process parameters, considering process variation (in particular Leff variation) reduces the mean noise by up to 4times and 3sigma noise by up to 13times when both applying the current model with temporal and logic-induced correlations. Note that stochastic optimization has been used mainly for process variation in the literature, but this paper convincingly demonstrate that stochastic optimization considering operation variation is effective to reduce overdesign introduced by worst case design for power integrity. Such stochastic optimization has a wide scope of applications to design problems. To the best of our knowledge, this is the first in-depth study on decap insertion for power network design considering current correlations including process variation.
  • Keywords
    capacitance; integrated circuit design; integrated circuit modelling; integrated circuit noise; iterative methods; stochastic processes; baseline model; decap budgeting; deterministic process; iterative alternative programming algorithm; logic-induced correlation; noise reduction; operation-process variations; power network design; process variations; stochastic current model; stochastic optimization; temporal correlation; variation-aware decoupling capacitance; Capacitance; Clocks; Crosstalk; Design optimization; Helium; Iterative algorithms; Noise reduction; Semiconductor device noise; Stochastic processes; Stochastic resonance; Decoupling capacitance (decap); optimization; variation;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2008.923636
  • Filename
    4544869