Built-in time measurement circuits -- a comparative design study

An increasingly important issue in the implementation of high-performance circuits using either System-on-Chip or System-in-Package technology is ensuring the correct timing performance at the input/output interfaces of cores or chips. These interfaces are not accessible to conventional Automatic Test Equipment (ATE). However, had these nodes been accessible the limitations of the ATE to make accurate measurements would necessitate the use of tight guard bands adversely impacting upon yield. To address this issue of internal time parameter measurement, the circuitry normally resident in the ATE to perform the measurements is incorporated into the design itself. This paper is a case study of three time measurement techniques potentially suitable for circuit integration, namely, Time Difference Measurement (TDM), Successive Approximation Time Measurement (SATM) and Time Delay Interpolation Measurement (TDIM) methods. The techniques are analysed and compared for a number of design parameters such as area overhead, ease of calibration, timing resolution, robustness to processing, temperature and supply voltage variations. The results of the analysis indicate that TDIM is the most efficient of the three circuits analysed; this method has been incorporated in a high-resolution time measurement system in the sub-picosecond range and has subsequently been fabricated by Sun Microsystems