Spice up your MOSFET modelling

Author

Cao, Yu ; Orshansky, Michael ; Sato, Takashi ; Sylvester, Dennis ; Hu, Chenming

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

19

Issue

4

fYear

2003

fDate

7/1/2003 12:00:00 AM

Firstpage

17

Lastpage

23

Abstract

A customizable and predictive BSIM model has been generated for devices with L_eff down to 12 nm and a wide range of interconnect sizes. Extensive evaluations demonstrate the validity of this approach. The main advantages of this approach over previous work are its applicability to generic technologies as well as the ease of use provided by a Web-based distribution model. These predictive technology models will be useful for circuit design research aimed at processes that are not yet available.

Keywords

MOSFET; SPICE; semiconductor device metallisation; semiconductor device models; 12 nm; BSIM model; MOSFET modeling; Web-based distribution model; circuit design research; generic technologies; interconnect sizes; predictive technology models; Analytical models; CMOS technology; Circuit simulation; Integrated circuit interconnections; MOSFET circuits; Physics; Predictive models; RLC circuits; SPICE; Semiconductor device modeling;

fLanguage

English

Journal_Title

Circuits and Devices Magazine, IEEE

Publisher

ieee

ISSN

8755-3996

Type

jour

DOI

10.1109/MCD.2003.1217613

Filename

1217613