Title :
50 nm MOSFETs with side-gates for induced source/drain extension
Author :
Choi, B.Y. ; Choi, W.Y. ; Lee, J.D. ; Park, B.G.
Author_Institution :
Coll. of Eng., Seoul Nat. Univ., South Korea
fDate :
5/23/2002 12:00:00 AM
Abstract :
50 nm long MOSFETs with side-gates were optimised in terms of the side-gate length and successfully fabricated with conventional MOS technology. The simulated and fabricated 50 nm long MOSFET shows a reasonable subthreshold swing of 81 mV/dec and a low drain induced barrier lowering of 77 mV
Keywords :
MOSFET; hot carriers; 50 nm; MOS technology; MOSFET; hot carrier effects; induced source/drain extension; low drain induced barrier lowering; side-gate length; subthreshold swing;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20020365
