Gate length effect on the RTS noise amplitude in SOI MOSFETs

Author

Simoen, E. ; Claeys, C.

Author_Institution

IMEC, Leuven, Belgium

Volume

17

Issue

4

fYear

1996

fDate

4/1/1996 12:00:00 AM

Firstpage

181

Lastpage

183

Abstract

The Random Telegraph Signal (RTS) noise amplitude in Silicon-on-Insulator MOSFETs is studied as a function of the gate length, by adding a second transistor in series. Different types of behavior can be distinguished, pointing toward a different origin of the related trapping centers. It is shown that in linear operation, the RTS amplitude and the corresponding low-frequency noise peak magnitude normally scales with 1/L. However, an increase with device length can also be found when the noise peaks of two RTSs add up. For RTSs occurring in the saturation regime, a complete elimination is observed for larger Ls, in support of the supposed film-related origin.

Keywords

MOSFET; electron traps; semiconductor device models; semiconductor device noise; silicon-on-insulator; RTS noise amplitude; SOI MOSFET; Si; gate length; gate length effect; linear operation; low-frequency noise peak magnitude; random telegraph signal; related trapping centers; saturation regime; Artificial intelligence; CMOS technology; Frequency; Length measurement; Low-frequency noise; MOSFET circuits; Noise level; Silicon on insulator technology; Telegraphy; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.485167

Filename

485167