Automatic synthesis of self-recovering VLSI systems

We describe an integrated system for synthesizing self-recovering microarchitectures called 𝒮𝒴𝒩𝒞ℰℛℰ in the 𝒮𝒴𝒩𝒞ℰℛℰ model for self-recovery, transient faults are detected using duplication and comparison, while recovery from transient faults is accomplished via checkpointing and rollback. 𝒮𝒴𝒩𝒞ℰℛℰ initially inserts checkpoints subject to designer specified recovery time constraints. Subsequently, 𝒮𝒴𝒩𝒞ℰℛℰ incorporates detection constraints by ensuring that two copies of the computation are executed on disjoint hardware. Towards ameliorating the dedicated hardware required for the original and duplicate computations, 𝒮𝒴𝒩𝒞ℰℛℰ imposes intercopy hardware disjointness at a sub-computation level instead of at the overall computation level. The overhead is further moderated by restructuring the pliable input representation of the computation. 𝒮𝒴𝒩𝒞ℰℛℰ has successfully derived numerous self-recovering microarchitectures. Towards validating the methodology for designing fault-tolerant VLSI ICs, we carried out a physical design of a self-recovering 16-point FIR filter