• DocumentCode
    758637
  • Title

    Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs

  • Author

    Colinge, J.P. ; Park, J.W. ; Xiong, W.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA
  • Volume
    24
  • Issue
    8
  • fYear
    2003
  • Firstpage
    515
  • Lastpage
    517
  • Abstract
    The subthreshold swing and threshold voltage characteristics of multiple-gate SOI transistors have been numerically simulated. These devices behave like cylindrical, surrounding gate devices, with the exception of the corner inversion effect. The corner inversion effect is, however, shown to be negligible if the devices are fully depleted devices or if the gate insulator thickness is small enough.
  • Keywords
    MOSFET; inversion layers; silicon-on-insulator; corner inversion effect; fully depleted devices; gate insulator thickness; multiple-gate SOI MOSFETs; subthreshold slope; threshold voltage; Doping; FETs; Insulation; MOS devices; MOSFETs; Numerical simulation; Semiconductor device modeling; Semiconductor films; Silicon on insulator technology; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2003.815153
  • Filename
    1218659