DocumentCode :
759221
Title :
Instruction scheduling for performance enhancement on a superscalar-based multiprocessor
Author :
Hwang, R.-Y.
Author_Institution :
Dept. of Electron. Eng., Nat. Taipei Inst. of Technol., Taiwan
Volume :
31
Issue :
6
fYear :
1995
fDate :
3/16/1995 12:00:00 AM
Firstpage :
432
Lastpage :
434
Abstract :
An instruction scheduling approach is proposed for a superscalar-based multiprocessor. There are two aspects of performance enhancement for our instruction scheduling approach: (i) converting LBD into LPD and (ii) reducing the damage of LBD
Keywords :
multiprocessing programs; multiprocessing systems; processor scheduling; instruction scheduling; performance enhancement; superscalar-based multiprocessor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19950329
Filename :
375905
Link To Document :
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