• DocumentCode
    759827
  • Title

    An Integrated Frequency Response Characterization System With a Digital Interface for Analog Testing

  • Author

    Valdes-Garcia, Alberto ; Hussien, Faisal Abdel-Latif ; Silva-Martinez, Jose ; Sanchez-Sinencio, Edgar

  • Author_Institution
    Dept. of Electr. Eng., Texas A&M Univ., College Station, TX
  • Volume
    41
  • Issue
    10
  • fYear
    2006
  • Firstpage
    2301
  • Lastpage
    2313
  • Abstract
    Current and future integrated systems demand cost-effective test solutions. In response to that need, this work presents a very compact mixed-signal test system. It performs the characterization of the magnitude and phase responses over frequency at multiple nodes of an analog circuit. The control inputs and output of this system are digital, enabling the test of the analog components in a system-on-chip (SoC) or system-in-package (SiP) through a low-cost digital automatic test equipment. Robust and area-efficient building blocks are proposed for the implementation of the test system, including a linearized analog multiplier for accurate magnitude and phase detection, a wide tuning range voltage-controlled oscillator and a low-power algorithmic analog-to-digital converter. Their individual design considerations and performance results are presented. A complete prototype in TSMC CMOS 0.35-mum technology employs only 0.3mm2 of area. The operation of this test system is demonstrated by performing frequency response characterizations up to 130 MHz at various nodes of two different fourth-order continuous-time filters integrated in the same chip
  • Keywords
    CMOS integrated circuits; analogue multipliers; analogue-digital conversion; automatic test equipment; continuous time filters; design for testability; frequency response; integrated circuit testing; system-in-package; system-on-chip; voltage-controlled oscillators; 0.35 micron; CMOS circuits; algorithmic ADC; analog testing; analog-to-digital converter; automatic test equipment; continuous-time filters; design considerations; design for testability; digital interface; frequency response characterization; linearized analog multiplier; magnitude response; mixed-signal test system; phase response; system-in-package; system-on-chip; voltage-controlled oscillator; Analog circuits; Automatic control; Automatic test equipment; Automatic testing; CMOS technology; Circuit testing; Control systems; Frequency response; System testing; System-on-a-chip; Analog testing; CMOS circuits; algorithmic ADC; analog multiplier; built-in testing; design for testability; multivibrator;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2006.881561
  • Filename
    1703685