DocumentCode :
760593
Title :
A Second-Order Frequency-Aided Digital Phase-Locked Loop for Doppler Rate Tracking
Author :
Chie, C.M.
Author_Institution :
LinCom Corp., Pasedena, CA, USA
Volume :
28
Issue :
8
fYear :
1980
fDate :
8/1/1980 12:00:00 AM
Firstpage :
1431
Lastpage :
1436
Abstract :
A second-order digital phase-locked loop (DPLL) has a finite lock range which is a function of the frequency of the incoming signal to be tracked. For this reason, it is not capable of tracking an input with Doppler rate for an indefinite period of time. In this correspondence, an analytical expression for the hold-in time is derived. In addition, an all-digital scheme to alleviate this problem is proposed based on the information obtained from estimating the input signal frequency.
Keywords :
PLLs; Phase-locked loop (PLL); Clocks; Costs; Digital integrated circuits; Frequency estimation; Frequency locked loops; Integrated circuit reliability; Large scale integration; Phase locked loops; Tracking loops; Very large scale integration;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOM.1980.1094787
Filename :
1094787
Link To Document :
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