Title :
Overview and Design of Mixed-Voltage I/O Buffers With Low-Voltage Thin-Oxide CMOS Transistors
Author :
Ker, Ming-Dou ; Chen, Shih-Lun ; Tsai, Chia-Sheng
Author_Institution :
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu
Abstract :
Overview on the prior designs of the mixed-voltage I/O buffers is provided in this work. A new 2.5/5-V mixed-voltage I/O buffer realized with only thin gate-oxide devices is proposed. The new proposed mixed-voltage I/O buffer with simpler dynamic n-well bias circuit and gate-tracking circuit can prevent the undesired leakage current paths and the gate-oxide reliability problem, which occur in the conventional CMOS I/O buffer. The new mixed-voltage I/O buffer has been fabricated and verified in a 0.25-mum CMOS process to serve 2.5/5-V I/O interface. Besides, another 2.5/5-V mixed-voltage I/O buffer without the subthreshold leakage problem for high-speed applications is also presented in this work. The speed, power consumption, area, and noise among these mixed-voltage I/O buffers are also compared and discussed. The new proposed mixed-voltage I/O buffers can be easily scaled toward 0.18- mum (or below) CMOS processes to serve other mixed-voltage I/O interfaces, such as 1.8/3.3-V interface
Keywords :
CMOS integrated circuits; buffer circuits; integrated circuit design; integrated circuit reliability; low-power electronics; mixed analogue-digital integrated circuits; 0.25 micron; 2.5 V; 5.0 V; gate-oxide reliability; gate-tracking circuit; high-speed applications; integrated circuit design; leakage current; mixed-voltage I-O buffer; n-well bias circuit; power consumption; thin gate-oxide devices; thin-oxide CMOS transistors; CMOS process; CMOS technology; Circuits; Energy consumption; Leakage current; MOS devices; Nanoscale devices; Semiconductor diodes; Subthreshold current; Voltage; Gate-oxide reliability; gate-tracking circuit; interface; mixed-voltage I/O buffer;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2006.882816
