A general characterization and simulation method for deposition and etching technology

Author

Tazawa, Satoshi ; Matsuo, Seitaro ; Saito, Kazuyuki

Author_Institution

NTT LSI Labs., Kanagawa, Japan

Volume

5

Issue

1

fYear

1992

fDate

2/1/1992 12:00:00 AM

Firstpage

27

Lastpage

33

Abstract

A topography simulation system and a six-parameter unified process model are proposed for general characterization of deposition and etching technology. This system is fit to use experimentally. This model precisely expresses the process characteristics of deposition and etching equipment. A surface movement vector calculation method suitable for the unified process model is also given. This method is used for calculating cross-sectional profiles including convex and concave corners, and for general LSI processes where deposition and etching reactions occur simultaneously. The parameters can be extracted from experimental results. The extraction method is also introduced. The simulated results agree well with the experimental ones of sputter deposition and bias-ECR (electron cyclotron resonance) deposition

Keywords

electronic engineering computing; etching; integrated circuit technology; large scale integration; plasma deposition; sputter deposition; LSI processes; bias ECR deposition; concave corners; convex corners; cross-sectional profiles; etching technology; parameter extraction; process characteristics; six-parameter unified process model; sputter deposition; surface movement vector; topography simulation system; Fabrication; Fluctuations; Genetic expression; Large scale integration; Personnel; Process design; Sputter etching; Sputtering; Surface fitting; Surface topography;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.121973

Filename

121973