DocumentCode
761629
Title
Using a test site for the rapid introduction of 32-kb bipolar RAM
Author
Magdo, Steven ; Gupta, Mani
Author_Institution
IBM Corp., Hopwell Junction, NY, USA
Volume
5
Issue
1
fYear
1992
fDate
2/1/1992 12:00:00 AM
Firstpage
62
Lastpage
67
Abstract
The authors describe the introduction of a 32-kb bipolar RAM. The introduction started with a preliminary phase, using an exploratory test site, followed by a more conventional product test site. Both the cell layout and processing were optimized with an exploratory test site in the early manufacturing cycle. The exploratory test site has yield test structures with different ground rules and cell layouts side by side. The yield detractors and product yields are continuously monitored in the manufacturing line with a product test site in order to enhance defect learning. A number of product test sites are distributed on the product wafer. The test site has the same ground rules as the product. The test-site-aided product introduction doubled the defect learning rate
Keywords
bipolar integrated circuits; integrated circuit manufacture; integrated circuit testing; integrated memory circuits; random-access storage; 32 kbit; bipolar RAM; cell layout; complementary transistor switch memory cell; defect learning; ground rules; manufacturing cycle; product yields; test site; test-site-aided product introduction; yield detractors; yield test structures; Chip scale packaging; Circuit testing; Costs; Inspection; Integrated circuit yield; Manufacturing processes; Monitoring; Optical feedback; Optical microscopy; Switches;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/66.121981
Filename
121981
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