• DocumentCode
    762772
  • Title

    Parallel decoding of binary BCH codes

  • Author

    Hwang, Taehyun

  • Author_Institution
    Inst. of Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    27
  • Issue
    24
  • fYear
    1991
  • Firstpage
    2223
  • Lastpage
    2225
  • Abstract
    A parallel decoding procedure for the BCH codes is introduced, which is particularly useful for decoding BCH codes with small error-correcting capability. The high regularity inherent in the scheme enable it to be easily implemented with VLSI circuits.
  • Keywords
    decoding; information theory; VLSI circuits; binary BCH codes; decoding BCH codes; parallel decoding procedure; small error-correcting capability;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19911375
  • Filename
    109499
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=762772