Editorial

Efficient and scalable interconnection networks are the base on top of which new computing platforms will be designed and will be critically important for overall system performance. This special issue brings together the best four papers of the 6th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC) held in conjunction with the 7th HiPEAC Conference in Paris, January 2012. The papers represent extended and peer-reviewed versions of the original work focusing on many aspects of network design and covering both on- and off-chip networks and include: