Impact of TaN as Wet Etch Stop Layer on Device Characteristics for Dual-Metal HKMG Last Integration CMOSFETs

Author

Zhaoyun Tang ; Jing Xu ; Hong Yang ; Hushan Cui ; Bo Tang ; Yefeng Xu ; Hongli Wang ; Junfeng Li ; Jiang Yan

Author_Institution

Inst. of Microelectron., Beijing, China

Volume

34

Issue

12

fYear

2013

fDate

Dec. 2013

Firstpage

1488

Lastpage

1490

Abstract

TaN as wet etch stop layer is implemented in dual-metal high- k/metal gate last integration CMOSFETs. Impacts of TaN on device characteristics are investigated. With thicker TaN, flat-band voltages (Vfb) of both n- and p-FETs shift to zero value position. Sensitivities of TaN thickness on Vfb are obtained with 81 and -114 mV/nm for n- and p-FETs, respectively. It could be served as an important enhancement tuning factor for threshold voltage (Vth) adjustment in CMOSFETs due to contributions of TaN on Vth values are in the same direction. With CMOS technology moving to below 22-nm node, it is crucial to control amount of wet etch of TaN layer, otherwise device characteristics would be impacted and double hump happens.

Keywords

CMOS integrated circuits; MOSFET; etching; high-k dielectric thin films; sensitivity analysis; tantalum compounds; CMOS technology; TaN; device characteristics; dual-metal HKMG last integration CMOSFET; dual-metal high- k/metal gate; flat-band voltages; n-FET; p-FET; sensitivities; threshold voltage; tuning factor; wet etch stop layer; zero value position; CMOS integrated circuits; CMOSFETs; High K dielectric materials; MOSFET circuits; Metals; Threshold voltage; Double hump; TaN; flat-band voltage; high-$k$/metal gate (HKMG); threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2013.2287271

Filename

6651734