Title :
Levelwise algorithms for vector processing of sparse power system matrices
Author :
Montagna, M. ; Granelli, G.P. ; Vuong, G.T. ; Chahine, R.
Author_Institution :
Pavia Univ., Italy
fDate :
2/1/1996 12:00:00 AM
Abstract :
Algorithms exploiting factorization path graph levels have been proposed in order to obtain a fine grain scheduling of sparse matrix operations suitable for vector/parallel processing. This paper deals with the problem of how to make levelwise algorithms more computationally efficient on vector processors. Existing implementations of (static) levelwise algorithms are reconsidered, showing that the recursive nature of the update operations is the bottleneck of the computation. A novel dynamic levelwise algorithm that is capable of overcoming the recurrence problem is proposed. It is based on reforming the level sets each time a new batch of vectorizable operations is scheduled. Test cases consist of the factorization and FIB substitution using sparse power system matrices with dimensions of up to 12000. The tests are carried out on a CRAY Y-MP C94/2128 vector computer. Speed-ups of about one order of magnitude have been achieved by the dynamic levelwise algorithm compared to a standard sparsity-based algorithm
Keywords :
parallel algorithms; power system analysis computing; sparse matrices; vector processor systems; CRAY Y-MP C94/2128 vector computer; FIB substitution; dynamic levelwise algorithm; factorization; factorization path graph levels; fine grain scheduling; levelwise algorithms; parallel processing; recurrence problem; sparse power system matrices; vector processing; Heuristic algorithms; Level set; Parallel processing; Power system dynamics; Power systems; Processor scheduling; Scheduling algorithm; Sparse matrices; System testing; Vector processors;
Journal_Title :
Power Systems, IEEE Transactions on