Low-power exponent architecture in finite fields

The paper presents an efficient exponent architecture for public-key cryptosystems in the finite field GF(2/sup m/). Multiplication is the key operation in implementing circuits for cryptosystems, as the process of encrypting and decrypting a message requires modular exponentiation, which can be decomposed into repeated multiplications. Exponentiation is implemented more efficiently by repeatedly applying AB/sup 2/ multiplications rather than AB multiplications. Thus, effective AB/sup 2/ multiplication algorithms and simple architectures are the key for implementing exponentiations. Accordingly, the paper proposes an efficient inner product multiplication algorithm using an irreducible all one polynomial (AOP) and simple architecture. Furthermore, the proposed bit-serial multiplication algorithm and architecture are highly regular and simpler than those in previous studies.