Title :
An efficient redundant-binary number to binary number converter
Author :
Yen, Sung-Ming ; Laih, Chi-Sung ; Chen, Chin-Hsing ; Lee, Jau-Yien
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fDate :
1/1/1992 12:00:00 AM
Abstract :
The authors present a method for converting the redundant-binary representation into the 2´s complement binary representation. Instead of using the conventional full adders, a more efficient redundant-binary number to binary number converter can be designed with the aid of the new variable Ci. The method can be applied to both `serial´ and `lookahead´ modes. In both modes, it was shown that the authors´ converter takes less chip area and conversion time when compared with the conventional method
Keywords :
digital arithmetic; logic design; number theory; 2´s complement binary representation; chip area; conversion time; lookahead mode; number system conversion; redundant-binary number to binary number converter; redundant-binary representation; serial mode; variable Ci; Adders; Arithmetic; Chip scale packaging; Equations; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
