• DocumentCode
    768628
  • Title

    Standards: DASC sees moves toward formality in design

  • Author

    Berman, Victor

  • Author_Institution
    Cadence Design Syst.
  • Volume
    23
  • Issue
    5
  • fYear
    2006
  • fDate
    5/1/2006 12:00:00 AM
  • Firstpage
    428
  • Lastpage
    429
  • Abstract
    We discussed two interesting standardization proposals: Rosetta and Esterel version 7. Both are based on technology that has been under development for a long time, and both target the formalization of system-level design and verification. System-level design involves consolidating information from multiple domains to predict the effects of design decisions. To support system-level design, a language must allow heterogeneous specification while providing mechanisms to compose information across domains. The goal of the Rosetta system-level design language is to compose heterogeneous specifications in a single semantic environment. Esterel is a for mal synchronous language for unambiguously specifying and implementing hardware and software embedded systems. Thus the purpose of is paper is to provide the EDA, semi conductor, and systems-design communities with a well- defined, official IEEE definition of the Esterel language
  • Keywords
    IEEE standards; electronic design automation; embedded systems; hardware description languages; DASC; Design Automation Standards Committee; EDA; Esterel language; Rosetta language; embedded system; formal synchronous language; heterogeneous specification; system-level design; Communities; Conductors; Electronic design automation and methodology; Embedded software; Embedded system; Hardware; Proposals; Software systems; Standardization; System-level design; Esterel version 7; Rosetta; system-level design language;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2006.131
  • Filename
    1704738