DocumentCode :
768670
Title :
A comparison of methods for total dose testing of bulk CMOS and CMOS/SOS devices
Author :
Baze, M.P. ; Plaag, R.E. ; Johnston, A.H.
Author_Institution :
Boeing Aerosp. & Electron., Seattle, WA, USA
Volume :
37
Issue :
6
fYear :
1990
fDate :
12/1/1990 12:00:00 AM
Firstpage :
1818
Lastpage :
1824
Abstract :
Low- and high-dose-rate testing results are compared for CMOS technologies. The long-term experiments extend over time periods of more than one year so that comparisons could be made over time frames more nearly like those in the space environment. High-temperature annealing is evaluated as a means of accelerating the annealing time and predicting low-dose-rate results. The data on hardened CMOS and CMOS/SOS devices show that for these particular processes, annealing at 100°C did not accelerate trapped hole annealing. Differences between expected and actual results are identified, and recommendations are made for improving test procedures
Keywords :
CMOS integrated circuits; X-ray effects; annealing; gamma-ray effects; hole traps; integrated circuit testing; radiation hardening (electronics); 100 degC; CMOS technologies; CMOS/SOS devices; X-ray irradiation; annealing time; gamma irradiation; hardened devices; high temperature annealing; high-dose-rate testing; long-term experiments; low-dose-rate results; space environment; total dose testing; trapped hole annealing; voltage shifts; Acceleration; Aerospace electronics; Aerospace testing; Annealing; CMOS process; CMOS technology; Electronic equipment testing; Interface states; Space technology; Temperature;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.101195
Filename :
101195
Link To Document :
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