Alpha-particle sensitive test SRAMs

Author

Buehler, M.G. ; Blaes, B.R.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

Volume

37

Issue

6

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1849

Lastpage

1854

Abstract

A bench-level test is being developed to evaluate memory-cell upsets in a test SRAM designed with a cell offset voltage. This offset voltage controls the critical charge needed to upset the cell. The effect is demonstrated using a specially designed 2-μm n-well CMOS 4-kb test SRAM and a Po-208 5.1-MeV 0.61-LET alpha-particle source. This test SRAM has been made sensitive to alpha particles through the use of a cell offset voltage, and this has allowed a bench-level characterization in a laboratory setting. The experimental data are linked to a alpha-particle interaction physics and to SPICE circuit simulations through the alpha-particle collection depth. The collection depth is determined by two methods and found to be about 7 μm. In addition, alpha particles that struck outside the bloated drain were able to flip the SRAM cells. This lateral charge collection was observed to be more than 6 μm

Keywords

CMOS integrated circuits; SRAM chips; alpha-particle effects; integrated circuit testing; 0.61-LET alpha-particle source; 2 micron; 4 kbit; 5.1 MeV; ²⁰⁸Po; SEU chip upset rate; SPICE circuit simulations; SRAM cells; alpha-particle collection depth; alpha-particle interaction physics; bench-level test; cell offset voltage; critical charge; lateral charge collection; memory-cell upsets; n-well CMOS process; vacuum test; Alpha particles; CMOS technology; Ion sources; Laboratories; MOSFETs; Optical pulses; Propulsion; Random access memory; Testing; Voltage control;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.101200

Filename

101200