DocumentCode
768774
Title
SEU and latchup tolerant advanced CMOS technology
Author
Koga, R. ; Crawford, K.B. ; Hansel, S.J. ; Johnson, B.M. ; Lau, D.D. ; Penzin, S.H. ; Pinkerton, S.D. ; Maher, M.C.
Author_Institution
Aerosp. Corp., El Segundo, CA, USA
Volume
37
Issue
6
fYear
1990
fDate
12/1/1990 12:00:00 AM
Firstpage
1869
Lastpage
1875
Abstract
Selected microcircuits constructed in National Semiconductor´s FACT (Fairchild advanced CMOS technology) were tested for heavy-ion-induced single event upset (SEU) and latchup. The devices showed no signs of heavy-ion-induced latchup for linear energy transfer (LET) values up to 120 MeV/(mg/cm2). SEU LET thresholds varied within a rather narrow range of 40 to 60 MeV/(mg/cm2). The test results suggest that FACT devices will exhibit higher tolerances to the cosmic ray environment than functionally similar microcircuits fabricated in HC/HCT (high-speed CMOS), ALS (advanced low-power Schottky), and LS (low-power Schottky) technologies
Keywords
CMOS integrated circuits; integrated circuit technology; integrated circuit testing; ion beam effects; 120 MeV; 40 to 60 MeV; CMOS technology; Fairchild advanced CMOS technology; LET thresholds; National Semiconductor FACT; SEU tolerance; cosmic ray environment; heavy-ion-induced single event upset; latchup tolerance; linear energy transfer; microcircuit testing; CMOS logic circuits; CMOS technology; Epitaxial layers; Logic devices; Logic testing; MOSFETs; Plasma temperature; Semiconductor device testing; Single event upset; Space technology;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/23.101203
Filename
101203
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