DocumentCode
769270
Title
Comments on `Using cache mechanisms to exploit nonrefreshing DRAM´s for on-chip memories´
Author
Cortadella, Jordi ; Jové, Teodor
Author_Institution
Dept. of Comput. Archit. Politech. Univ. of Catalonia, Barcelona, Spain
Volume
27
Issue
1
fYear
1992
fDate
1/1/1992 12:00:00 AM
Firstpage
132
Abstract
For the original article see ibid., vol.26, no.4, pp.657-61 (Apr. 1991). In the above-titled paper by D.D. Lee and R.H. Katz, a method for eliminating the need for refreshing for DRAM on-chip caches is presented as a new approach. It is pointed out that the commenters in fact introduced this method in a previous paper (Comput. Arch. News, vol.16, no.4, pp. 45-50, Sept. 1988)
Keywords
DRAM chips; buffer storage; DRAM on-chip caches; DRAM refresh need elimination; cache mechanisms; method; nonrefreshing DRAMs; on-chip memories; Circuits; Computer aided instruction; Computer architecture; Computer science education; Random access memory; Read-write memory;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.109570
Filename
109570
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