A pixel scale digital to analog converter array for liquid crystal on VLSI displays

A pixel scale digital to analog converter and driver for liquid crystal (LC) cells is presented. The circuit is a compact CMOS logic gate that sums pulse density modulation (pdm) signals. Low pass filtering of the pdm signal is done by the LC material. The circuit is suitable to implement large arrays of converters as, for example, in display applications. It is applicable in LC on silicon displays where gray scale data are stored and converted at each pixel site. Advantages over the commonly used active matrix technology include the removal of all analog circuitry, no need for refresh, reduced interconnect complexity, no capacitive loading of analog lines, and the ability to build larger scale or smart displays that combine memory, processing, and drive circuitry. Experimental results from a CMOS implementation are presented