Title :
A unified triode/saturation model with an improved continuity in the output conductance suitable for CAD of VLSI circuits using deep sub-0.1 μm NMOS devices
Author :
Chen, Y.G. ; Kuo, J.B.
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
2/1/1996 12:00:00 AM
Abstract :
This paper reports a unified triode/saturation model with an improved continuity in the output conductance suitable for CAD of VLSI circuits using deep sub-0.1 μm NMOS devices. As verified by the experimental data, the model shows an accurate prediction of the output conductance characteristics
Keywords :
MOS integrated circuits; VLSI; circuit CAD; circuit analysis computing; digital simulation; electric admittance; integrated circuit design; integrated circuit modelling; CAD; VLSI; conductance characteristics prediction; deep submicron NMOS devices; output conductance; unified triode/saturation model; Electron mobility; Geometry; Integrated circuit modeling; MOS devices; Surface fitting; Threshold voltage; Very large scale integration;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
