DocumentCode
770446
Title
Improvement in High- 
Reliability by Incorporation of Fluorine
Author
Seo, Kang-ill ; Sreenivasan, Raghavasimhan ; McIntyre, Paul C. ; Saraswat, Krishna C.
Author_Institution
Dept. of Mater. Sci. & Eng., Stanford Univ., CA
Volume
27
Issue
10
fYear
2006
Firstpage
821
Lastpage
823
Abstract
In this letter, we demonstrate that negative bias temperature instability of high-k (HfO2/SiO2) gate dielectric stacks can be greatly improved by incorporating fluorine and engineering its concentration depth profile with respect to HfO2/SiO2 interface. It was found that fluorine is easily incorporated in HfO2/SiO2 at low temperatures (les400degC) by F2 anneal in the presence of UV radiation. Fluorine tends to segregate at the HfO2/SiO2 interface and, to a lesser extent, diffuses into the underlying SiO2/Si interface. The HfO2 /SiO2 stacks with F addition show significantly reduced (<50%) positive charge trapping and interface states generation compared to control samples without F
Keywords
CMOS integrated circuits; annealing; fluorine; hafnium compounds; high-k dielectric thin films; integrated circuit reliability; silicon compounds; thermal stability; CMOS integrated circuits; HfO2-SiO2; UV radiation; gate dielectric stacks; interface states generation; negative bias temperature instability; positive charge trapping; Annealing; Atomic layer deposition; CMOS technology; Dielectric substrates; Hafnium oxide; Interface states; Negative bias temperature instability; Niobium compounds; Temperature distribution; Titanium compounds; Fluorine; high-; interface states; negative bias temperature instability (NBTI); positive charges;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2006.882564
Filename
1704911
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