Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance

Author

She, Min ; King, Tsu-Jae

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA

Volume

50

Issue

9

fYear

2003

Firstpage

1934

Lastpage

1940

Abstract

The write/erase characteristics of Germanium nanocrystal memory device are modeled using single-charge tunneling theory with quantum confinement and Coulomb blockade effects. A trap model is proposed to describe the retention characteristic of the nanocrystal memory. The impact of nanocrystal size, tunnel-oxide thickness, and high-k tunnel material is studied, and the suitability of the nanocrystal memory devices for nonvolatile memory and DRAM applications is discussed. Issues related to the scaling limit of the nanocrystal memory device are investigated.

Keywords

Coulomb blockade; DRAM chips; elemental semiconductors; germanium; nanoelectronics; semiconductor storage; tunnelling; Coulomb blockade; DRAM; Ge; crystal size; high-k dielectric; nonvolatile memory; quantum confinement; retention characteristics; scaling limit; semiconductor nanocrystal memory; single-charge tunneling; trap model; tunnel dielectric; tunnel oxide thickness; write/erase characteristics; EPROM; Energy consumption; High K dielectric materials; High-K gate dielectrics; Nanocrystals; Nonvolatile memory; Potential well; Random access memory; Tunneling; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2003.816525

Filename

1224495