A discrete Fourier transform using switched capacitor circuits in systolic array architecture

Author

Raut, R. ; Bhattacharyya, B.B. ; Faruque, S.M.

Author_Institution

Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada

Volume

Issue

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1578

Lastpage

1580

Abstract

Basic SC building blocks are introduced and interconnection of these blocks in a systolic array architecture is shown to yield the desired DFT components. Simulation results using implementation on a workstation and SWITCAP program are reported

Keywords

Fourier transforms; analogue computer circuits; switched capacitor networks; systolic arrays; DFT components; SC building blocks; SWITCAP program; discrete Fourier transform; simulation; switched capacitor circuits; systolic array architecture; Circuit stability; Discrete Fourier transforms; Integrated circuit interconnections; Iterative algorithms; Large scale integration; Polynomials; Switched capacitor circuits; Systolic arrays; Very large scale integration; Workstations;

fLanguage

English

Journal_Title

Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0098-4094

Type

jour

DOI

10.1109/31.101284

Filename

101284

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=770752