Title :
Hardware annealing in electronic neural networks
Author :
Lee, Bang W. ; Sheu, Bing J.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fDate :
1/1/1991 12:00:00 AM
Abstract :
A simulated hardware annealing process for electronic neural circuits is derived from the analogy between the temperature in a Boltzmann machine and the amplifier gain in a VLSI chip. Here, varying the amplifier gain is equivalent to changing the temperature of the probability function in a Boltzmann machine. Decrease in the amplifier voltage gain is equivalent to temperature increase. The beginning and final annealing temperatures for the hardware annealing can be precisely determined. Theory and experimental results on a 4-b Hopfield analog-to-digital converters with simulated annealing are presented
Keywords :
analogue-digital conversion; circuit CAD; neural nets; simulated annealing; Boltzmann machine; Hopfield ADC; VLSI chip; amplifier gain; annealing temperatures; electronic neural networks; probability function; simulated hardware annealing process; Computational modeling; Hopfield neural networks; Intelligent networks; Neural network hardware; Neural networks; Neurons; Simulated annealing; Temperature distribution; Very large scale integration; Voltage;
Journal_Title :
Circuits and Systems, IEEE Transactions on
