DocumentCode :
772349
Title :
A 1-V, 5.5-GHz, CMOS LNA With Multiple Magnetic Feedback
Author :
Vitzilaios, Georgios ; Papananos, Yannis ; Theodoratos, Gerasimos ; Vasilopoulos, Athanasios
Author_Institution :
Sch. of Electr. & Comput. Eng., Athens Nat. Tech. Univ.
Volume :
53
Issue :
9
fYear :
2006
Firstpage :
971
Lastpage :
975
Abstract :
A CMOS low-noise amplifier that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance is presented. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without noise figure (NF) degradation. Simulation results indicate voltage conversion gain of 17 dB, NF of 1.6 dB, and best-case third-order input intercept point of 13 dBm. The design is being implemented in a 0.13-mum CMOS technology
Keywords :
CMOS integrated circuits; MMIC amplifiers; feedback; low noise amplifiers; transformers; 0.13 micron; 1 V; 1.6 dB; 17 dB; 5.5 GHz; CMOS low-noise amplifier; gate-drain overlap capacitance; integrated transformers; multiple magnetic feedback; negative feedback; positive feedback; CMOS technology; Capacitance; Degradation; Frequency; Gain; Low-noise amplifiers; Negative feedback; Noise figure; Noise measurement; Topology; CMOS RF integrated circuit design; integrated low-noise amplifier (LNA); integrated transformers; low voltage; magnetic feedback technique;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2006.881810
Filename :
1705077
Link To Document :
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