Analytical modeling of the two-dimensional potential distribution and threshold voltage of the SOI four-gate transistor

Author

Akarvardar, Kerem ; Cristoloveanu, Sorin ; Gentil, Pierre

Author_Institution

IMEP, Grenoble

Volume

53

Issue

10

fYear

2006

Firstpage

2569

Lastpage

2577

Abstract

The two-dimensional (2-D) channel potential and threshold voltage of the silicon-on-insulator (SOI) four-gate transistor (G⁴-FET) are modeled. The 2-D analytical body potential is derived by assuming a parabolic potential variation between the lateral junction-gates and by solving Poisson´s equation. The model is used to obtain the surface threshold voltage of the G⁴-FET as a function of the lateral gate bias and for all possible charge conditions at the back interface. The body-potential model is extendable to fully depleted SOI MOSFETs and can serve to depict the charge-sharing and drain-induced barrier-lowering effects in short-channel devices

Keywords

MOSFET; Poisson equation; electric potential; semiconductor device models; silicon-on-insulator; 2D channel potential; 2D potential distribution; G⁴-FET; Poisson equation; four-gate transistor; fully depleted SOI MOSFET; lateral junction-gates; short-channel devices; silicon-on-insulator; threshold voltage; Analytical models; FETs; Helium; MOSFET circuits; Poisson equations; Silicon on insulator technology; Threshold voltage; Transconductance; Two dimensional displays; Voting; Charge sharing; MOSFET; drain-induced barrier lowering; four-gate transistor; junction FET (JFET); multiple-gate transistor; potential distribution; short-channel effect; silicon-on-insulator (SOI); threshold voltage; two-dimensional (2-D) modeling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2006.882283

Filename

1705111