Title :
A Low-Power CMOS Receiver for 1.25 Gb/s Over 1- mm SI-POF Links
Author :
Sanchez-Azqueta, Carlos ; Gimeno, Cecilia ; Guerrero, E. ; Aldea, Concepcion ; Celma, S.
Author_Institution :
Group of Electron. Design (GDE), Univ. of Zaragoza, Zaragoza, Spain
Abstract :
This paper presents an optical receiver for short-reach applications through low-cost plastic optical fiber. The limited bandwidth caused by the fiber and the external photodiode is compensated by a new adaptive equalizer based on the spectrum balancing technique. A clock and data recovery circuit is included that minimizes jitter and metastability using a new multilevel bang-bang architecture. The prototype, implemented in a standard 0.18-μm CMOS process, achieves 1.25 Gb/s with a power of 107 mW at only 1 V.
Keywords :
CMOS integrated circuits; clock and data recovery circuits; optical fibre networks; optical links; optical receivers; photodiodes; SI-POF links; adaptive equalizer; bit rate 1.25 Gbit/s; clock recovery circuit; data recovery circuit; external photodiode; low power CMOS receiver; multilevel bang-bang architecture; optical receiver; plastic optical fiber; size 1 mm; spectrum balancing technique; Adaptive equalizers; Bandwidth; Low-pass filters; Optical fiber amplifiers; Optical fiber networks; Adaptive equalizers; CMOS integrated circuits; optical fiber communication;
Journal_Title :
Industrial Electronics, IEEE Transactions on
DOI :
10.1109/TIE.2013.2288198
