DocumentCode :
773906
Title :
Improved Adiabatic Pseudo Domino Logic 2 (IAPDL-2)
Author :
Widjaja, B.W. ; Lau, K.T.
Author_Institution :
Center for Integrated Circuit & Syst., Nanyang Technol. Univ., Singapore, Singapore
Volume :
39
Issue :
16
fYear :
2003
Firstpage :
1167
Lastpage :
1169
Abstract :
IAPDL-2 - a modification of Improved Adiabatic Pseudo Domino Logic (IAPDL) - is presented. The basic structure is similar to the IAPDL, with a reduction of one diode and implementation of a trapezoidal power clock. This results in a smaller device count, area savings, and reduced power dissipation at low supply voltage.
Keywords :
logic circuits; IAPDL-2; Improved Adiabatic Pseudo Domino Logic 2; power dissipation;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20030759
Filename :
1226559
Link To Document :
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