Title : 
Improved Adiabatic Pseudo Domino Logic 2 (IAPDL-2)
         
        
            Author : 
Widjaja, B.W. ; Lau, K.T.
         
        
            Author_Institution : 
Center for Integrated Circuit & Syst., Nanyang Technol. Univ., Singapore, Singapore
         
        
        
        
        
        
        
            Abstract : 
IAPDL-2 - a modification of Improved Adiabatic Pseudo Domino Logic (IAPDL) - is presented. The basic structure is similar to the IAPDL, with a reduction of one diode and implementation of a trapezoidal power clock. This results in a smaller device count, area savings, and reduced power dissipation at low supply voltage.
         
        
            Keywords : 
logic circuits; IAPDL-2; Improved Adiabatic Pseudo Domino Logic 2; power dissipation;
         
        
        
            Journal_Title : 
Electronics Letters
         
        
        
        
        
            DOI : 
10.1049/el:20030759