Conflict free memory addressing for dedicated FFT hardware

Author

Johnson, L.G.

Author_Institution

Sch. of Electr. & Comput. Eng., Oklahoma State Univ., Stillwater, OK, USA

Volume

39

Issue

5

fYear

1992

fDate

5/1/1992 12:00:00 AM

Firstpage

312

Lastpage

316

Abstract

A multibank memory address assignment for an arbitrary fixed radix fast Fourier transform (FFT) algorithm suitable for high-speed single-chip implementation is developed. The memory assignment is `in place´ to minimize memory size and is memory-bank conflict-free to allow simultaneous access to all the data needed for calculation of each of the radix r butterflies as they occur in the algorithm. Address generation for table lookup of twiddle factors is also included. The data and twiddle factor address generation hardware is shown to have small size and high speed

Keywords

computerised signal processing; fast Fourier transforms; mathematics computing; storage allocation; storage management chips; table lookup; conflict free memory addressing; dedicated FFT hardware; fast Fourier transform; fixed radix; high-speed; multibank memory address assignment; single-chip implementation; table lookup; twiddle factors; Circuits; Digital signal processing chips; Discrete Fourier transforms; Discrete transforms; Fast Fourier transforms; Flow graphs; Hardware; Insects; Read-write memory; Signal processing algorithms;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.142032

Filename

142032