Title :
Bulk-FinFETs implementing insulating layer under source and drain for DRAM cell application
Author :
Park, J.S. ; Park, J.-M. ; Han, S.-Y. ; Yamada, S. ; Roh, Y.H. ; Park, D.-G.
Author_Institution :
R&D Center, Samsung Electron. Co., Hwasung
Abstract :
Partially-insulated oxide (PIOX) layers are implemented under the source/drain region in bulk FinFETs. The improved short channel effect by controlling the sub-channel on the bottom part of the gate in bulk FinFETs, the decreased junction leakage current due to blocking the vertical leakage path by PIOX layers, and the increased hot carrier lifetime can be applicable to future DRAM cell transistors.
Keywords :
DRAM chips; MOSFET; hot carriers; leakage currents; transistors; DRAM cell application; DRAM cell transistors; FinFET; hot carrier lifetime; insulating layer; junction leakage current; partially-insulated oxide layers; short channel effect; vertical leakage path;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20080697
