Title :
A novel high-speed sense-amplifier-based flip-flop
Author :
Strollo, Antonio G M ; De Caro, Davide ; Napoli, Ettore ; Petra, Nicola
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Univ. of Napoli "Federico II", Naples, Italy
Abstract :
A new sense-amplifier-based flip-flop is presented. The output latch of the proposed circuit can be considered as an hybrid solution between the standard NAND-based set/reset latch and the NC-/sup 2/MOS approach. The proposed flip-flop provides ratioless design, reduced short-circuit power dissipation, and glitch-free operation. The simulation results, obtained for a 0.25-/spl mu/m technology, show improvements in the clock-to-output delay and the power dissipation with respect to the recently proposed high-speed flip-flops. The new circuit has been successfully employed in a high-speed direct digital frequency synthesizer chip, highlighting the effectiveness of the proposed flip-flop in high-speed standard cell-based applications.
Keywords :
CMOS digital integrated circuits; amplifiers; direct digital synthesis; flip-flops; high-speed integrated circuits; integrated circuit design; 0.25 micron; CMOS digital integrated circuits; clock-to-output delay; glitch-free operation; high-speed direct digital frequency synthesizer chip; high-speed flip-flop; sense amplifiers; set-reset latches; short-circuit power dissipation reduction; Circuits; Clocks; Delay; Flip-flops; Latches; Pipelines; Power dissipation; Pulse generation; Sampling methods; Switches; CMOS digital integrated circuits; Clocking; flip-flops; sense amplifier;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2005.859586
