• DocumentCode
    774793
  • Title

    Nonstuck behaviour of open circuit supply faults in CMOS logic circuits

  • Author

    Johnson, S. ; Morant, M.J.

  • Author_Institution
    Sch. of Eng., Durham Univ., UK
  • Volume
    143
  • Issue
    1
  • fYear
    1996
  • fDate
    2/1/1996 12:00:00 AM
  • Firstpage
    9
  • Lastpage
    13
  • Abstract
    The authors describe a mechanism which allows CMOS circuits containing a break in a power supply track (referred to as open circuit supply faults) to operate with little change in their performance parameters. In circuits containing such faults, current can be supplied through the substrate or well contacts enabling logic gates to operate at full design speed. Measurements on circuits containing such faults and results of simulations are presented to demonstrate the effect of the fault. The circuits operate normally, although they may be susceptible to latch-up behaviour and may fail in this way. Transient latch-up testing is recommended to detect such faults
  • Keywords
    CMOS logic circuits; circuit reliability; fault location; integrated circuit testing; power supply circuits; transients; CMOS logic circuits; fault detection; latch-up behaviour; logic gates; nonstuck behaviour; open circuit supply faults; performance parameters; power supply track; simulation; substrate; transient latch-up testing; well contacts;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices and Systems, IEE Proceedings -
  • Publisher
    iet
  • ISSN
    1350-2409
  • Type

    jour

  • DOI
    10.1049/ip-cds:19960034
  • Filename
    487967