A Simulation Study of Clock Recovery in QPSK and 9QPRS Systems

Computer simulation is employed to assess jitter performance of a clock recovery circuit as a function of the characteristics of the rectifier being used. Several types of rectifiers are compared, some operating at baseband, others at intermediate frequency (IF). It is shown that the best choice between them depends both on the modulation format and on the excess bandwidth factor of the pulse spectrum. In QPSK systems, fourth-law rectifiers outperform the others for rolloff factors up to 0.2 while, for higher values, baseband absolutevalue rectifiers are preferable. In the case of 9QPRS, baseband absolutevalue rectifiers provide jitter reductions of one order of magnitude at high signal-to-noise ratios.