Title :
Efficient Multibit Quantization in Continuous-Time
Modulators
Author :
De Maeyer, Jeroen ; Rombouts, Pieter ; Weyten, Ludo
Author_Institution :
Dept. of Electron. & Informations Syst., Ghent Univ.
fDate :
4/1/2007 12:00:00 AM
Abstract :
A drawback of continuous-time SigmaDelta modulators is their sensitivity to clock jitter. One way to counteract this is to use a multibit feedback loop which requires a (high resolution) multibit quantizer. However, every extra bit in the quantizer doubles its complexity, power consumption and capacitive load for the analog circuit that needs to drive the quantizer. In this paper a new concept for the quantization in sigma delta modulators is proposed. It allows to significantly reduce the required amount of comparators in the multibit quantizer. Three architectures that realize this new concept are presented and their implementation issues discussed. The architectures´ performance has been compared with a conventional modulator through computer simulations. Compared to the conventional modulator, the proposed architectures achieve the same performance, with much less comparators in the quantizer
Keywords :
clocks; comparators (circuits); quantisation (signal); sigma-delta modulation; timing jitter; analog circuit; analog-to-digital conversion; capacitive load; clock jitter; comparators; computer simulations; continuous-time SigmaDelta modulators; multibit feedback loop; multibit quantization; multibit quantizer; power consumption; sigma delta modulators; Analog circuits; Clocks; Computer architecture; Computer simulation; Delta modulation; Delta-sigma modulation; Energy consumption; Feedback loop; Jitter; Quantization; Analog-to-digital conversion; quanitzation; sigma–delta ($Sigma Delta$ ) modulation;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2007.890607