Title :
Large-signal subthreshold CMOS transconductance amplifier
Author :
Opris, I.E. ; Kovacs, G.T.A.
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., CA, USA
fDate :
4/27/1995 12:00:00 AM
Abstract :
A folding architecture for a subthreshold CMOS transconductance amplifier is described. Good linearity is obtained for an extremely large differential input voltage, without loss in the common-mode voltage range. Theoretical noise analysis indicates a 6 dB improvement in the dynamic range compared to a simple single-pair MOS implementation. A prototype has been fabricated in a 2 μm CMOS process, and experimental results are presented
Keywords :
CMOS analogue integrated circuits; feedback amplifiers; integrated circuit noise; 2 micron; CMOS transconductance amplifier; common-mode voltage range; folding architecture; large-signal subthreshold amplifier; linearity; noise analysis;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19950504
