DocumentCode
777573
Title
Reduced layer planar busbar for voltage source inverters
Author
Zare, Firuz ; Ledwich, Gerard F.
Author_Institution
Sch. of Electr. & Electron. Syst. Eng., Queensland Univ. of Technol., Brisbane, Qld., Australia
Volume
17
Issue
4
fYear
2002
fDate
7/1/2002 12:00:00 AM
Firstpage
508
Lastpage
516
Abstract
Planar busbars are used widely in modern high power inverters and have been shown to provide a good way for minimizing stray inductance and overshoot voltage. Planar busbars, which consist of multilayer copper sheets and dielectric insulators, offer significant advantages such as low impedance, improved thermal characteristic and reduced system cost compared with other interconnection approaches. A common problem of hard switched inverters is stray inductance, which needs to be minimized to reduce the effect of overvoltages. This paper presents a new physical structure for a voltage source inverter with symmetrical planar busbar structure, which minimizes the variation in stray inductance for different switching states. Three-dimensional (3-D) finite element simulations and experimental tests verify the theory
Keywords
busbars; finite element analysis; interconnections; invertors; losses; overvoltage; switching circuits; 3-D finite element simulations; dielectric insulators; improved thermal characteristic; inductance; low impedance; multilayer copper sheets; overshoot voltage minimisation; overvoltages effect minimisation; reduced layer planar busbar; reduced system cost; stray inductance minimisation; switching states; voltage source inverters; Copper; Costs; Dielectrics and electrical insulation; Impedance; Inductance; Inverters; Nonhomogeneous media; Power system interconnection; Surges; Voltage;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2002.800990
Filename
1016799
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