Ion induced charge collection and SEU sensitivity of emitter coupled logic (ECL) devices

Author

Koga, R. ; Crain, W.R. ; Hansel, S.J. ; Crawford, K.B. ; Kirshman, J.F. ; Pinkerton, S.D. ; Penzin, S.H. ; Moss, S.C. ; Maher, M.

Author_Institution

Aerosp. Corp., El Segundo, CA, USA

Volume

42

Issue

6

fYear

1995

fDate

12/1/1995 12:00:00 AM

Firstpage

1823

Lastpage

1828

Abstract

This paper presents single event upset (SEU) and latchup test results for selected Emitter Coupled Logic (ECL) microcircuits, including several types of low capacity SRAMs and other memory devices. The high speed of ECL memory devices makes them attractive for use in space applications. However, the emitter coupled transistor design increases susceptibility to radiation induced functional errors, especially SEU, because the transistors are not saturated, unlike the transistors in a CMOS device. Charge collection at the sensitive nodes in ECL memory elements differs accordingly. These differences are responsible, in part, for the heightened SEU vulnerability of ECL memory devices relative to their CMOS counterparts

Keywords

SRAM chips; bipolar memory circuits; emitter-coupled logic; flip-flops; integrated circuit testing; ion beam effects; proton effects; shift registers; D flip-flop; ECL memory devices; ECL microcircuits; SEU sensitivity; effective LET; emitter coupled transistor design; heavy ion irradiation; ion induced charge collection; latchup test results; low capacity SRAMs; proton irradiation; radiation induced functional errors; shift register; single event upset; space applications; Aerospace testing; CMOS logic circuits; CMOS technology; Logic devices; Logic testing; Random access memory; Semiconductor device testing; Single event upset; Space technology; Voltage;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.488785

Filename

488785