DocumentCode
778393
Title
Circuit-level dictionaries of CMOS bridging faults
Author
Lee, Terry ; Chuang, Weitong ; Hajj, Ibrahim N. ; Fuchs, W. Kent
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume
14
Issue
5
fYear
1995
fDate
5/1/1995 12:00:00 AM
Firstpage
596
Lastpage
603
Abstract
The contribution of this paper on the diagnosis (fault location) of CMOS bridging faults is threefold: First, the traditional fault dictionary (referred to as the full dictionary in this paper) is evaluated at the circuit level using a mixed-mode fault simulator. The fault set consists of randomly-generated gate input/output bridging faults. By using mixed-mode gate- and electrical-level detection methods, good diagnostic capability is achieved using only gate-level generated test sets. Second, we evaluate two reduced fault dictionaries, the pass/fail dictionary and the count dictionary. Finally, the effectiveness of IDDQ for diagnosis is examined. The results show that IDDQ, combined with the proposed voltage detection methods, achieves the highest diagnostic performance, with nearly complete diagnosis
Keywords
CMOS logic circuits; fault diagnosis; integrated circuit testing; logic testing; CMOS bridging faults; IDDQ testing; circuit-level dictionaries; count dictionary; diagnosis; diagnostic capability; fault dictionary; fault location; fault set; gate-level generated test sets; mixed-mode fault simulator; pass/fail dictionary; randomly-generated gate input/output bridging faults; voltage detection methods; Algebra; Circuit faults; Circuit simulation; Circuit testing; Delay; Dictionaries; Logic testing; Semiconductor device modeling; Sequential circuits; System testing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.384422
Filename
384422
Link To Document