Title :
256-stage superconducting digital correlator with analog output
Author :
Perng-Fei Yuh ; Stebbins, E.
Author_Institution :
Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan
fDate :
3/1/1995 12:00:00 AM
Abstract :
We report the development of a 256-stage, one-bit superconducting digital correlator functionally tested at a highest clock frequency of 10.232 GHz and data rate of 1.279 Gb/s. The correlator consists of two 256-bit shift registers for delay and storage, 256 exclusive-OR gates for multiplication, and 256 shunted SQUID´s to produce an analog summing output. It is fabricated using a Nb/AlO/sub x//Nb Josephson-junction process at a critical-current density of 1000 A/cm/sup 2/. The 5-mm square chip uses about 4350 Nb/AlO/sub x//Nb Josephson junctions and consumes about 0.4 mW.<>
Keywords :
SQUIDs; aluminium compounds; correlators; critical current density (superconductivity); digital circuits; niobium; superconductor-insulator-superconductor devices; 0.4 mW; 1.279 Gbit/s; 10.232 GHz; 256 bit; 256-stage one-bit superconducting digital correlator; 5 mm; Nb-AlO-Nb; Nb/AlO/sub x//Nb Josephson-junction; analog summing output; critical-current density; delay; exclusive-OR gates; multiplication; shift registers; shunted SQUIDs; storage; Bandwidth; Circuit testing; Clocks; Correlators; Delay; Frequency; Josephson junctions; Logic circuits; Niobium; Shift registers;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
