DocumentCode
779921
Title
Recent advances and new avenues in hardware-level reliability support
Author
Iyer, Ravishankar K. ; Nakka, Nithin M. ; Kalbarczyk, Nbigniew T. ; Mitra, Subhasish
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume
25
Issue
6
fYear
2005
Firstpage
18
Lastpage
29
Abstract
Discussion on some of the recent advances in logic- and architectural-level techniques to deal with transient errors serves as a "springboard" to motivate the need for hardware-level application-aware runtime checks, which the application can invoke from within its instruction stream per its dependability requirements. In contrast with traditional approaches of software and hardware duplication, alternative techniques such as fine-grained application-aware runtime checking offer more efficient, low-overhead detection, correction, and recovery.
Keywords
computer architecture; error detection; fault tolerance; field programmable gate arrays; integrated circuit design; microprocessor chips; architectural-level techniques; hardware-level application-aware runtime checks; Application software; Combinational circuits; Computer errors; Error correction; Flip-flops; Hardware; MOSFETs; Random access memory; Redundancy; Runtime; Error-checking; Redundant design; Reliability; Testing; and Fault-Tolerance;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2005.119
Filename
1566553
Link To Document