An experimental study of soft errors in microprocessors

Author

Saggese, Giacinto P. ; Wang, Nicholas J. ; Kalbarczyk, Zbigniew T. ; Patel, Sanjay J. ; Iyer, Ravishankar K.

Author_Institution

Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA

Volume

25

Issue

6

fYear

2005

Firstpage

30

Lastpage

39

Abstract

The issue of soft errors is an important emerging concern in the design and implementation of future microprocessors. The authors examine the impact of soft errors on two different microarchitectures: a DLX processor for embedded applications and a high-performance alpha processor. The results contrast impact of soft errors on combinational and sequential logic, identify the most vulnerable units, and assess soft error impact on the application.

Keywords

computer architecture; embedded systems; error detection; logic design; microprocessor chips; DLX processor; combinational logic; embedded applications; high-performance alpha processor; microarchitectures; microprocessors; sequential logic; soft errors; Application software; Computer crashes; Computer errors; Electromagnetic interference; Flip-flops; Logic devices; Microprocessors; Pins; Registers; Voltage; Assessment and Protection Techniques; Fault Injection; Microprocessor Architecture; Soft error sensitivity; Soft errors;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/MM.2005.104

Filename

1566554