DocumentCode
780405
Title
Enumeration of test sequences in increasing chronological order to improve the levels of compaction achieved by vector omission
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
51
Issue
7
fYear
2002
fDate
7/1/2002 12:00:00 AM
Firstpage
866
Lastpage
872
Abstract
We describe a method to improve the levels of compaction achievable by static compaction procedures based on vector omission. Such procedures are used to reduce the lengths of test sequences for synchronous sequential circuits without reducing the fault coverage. The proposed procedure enumerates, in increasing chronological order, test sequences consisting of subsets of the vectors included in a given test sequence that needs to be compacted. The unique feature of this approach is that test vectors omitted from the test sequence at an earlier iteration can be reintroduced at a later iteration. This results in a less greedy procedure and helps reduce the compacted test sequence length beyond the length that can be achieved if vectors are omitted permanently as in earlier procedures
Keywords
circuit testing; logic testing; sequential circuits; vectors; chronological order; fault coverage; greedy procedure; static test compaction procedures; synchronous sequential circuits; test sequence enumeration; vector omission; Circuit faults; Circuit testing; Compaction; Electrical fault detection; Fault detection; Sequential analysis; Sequential circuits;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2002.1017705
Filename
1017705
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